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MC74AC157, MC74ACT157 Quad 2-Input Multiplexer
The MC74AC157/74ACT157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true (noninverted) form. The MC74AC157/74ACT157 can also be used as a function generator.
Features
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* Outputs Source/Sink 24 mA * ACT157 Has TTL Compatible Inputs * Pb-Free Packages are Available*
VCC 16 E 15 I0c 14 I1c 13 Zc 12 I0d 11 I1d 10 Zd 9
16 1
PDIP-16 N SUFFIX CASE 648
16 1
SOIC-16 D SUFFIX CASE 751B
16 1 1 S 2 I0a 3 I1a 4 Za 5 I0b 6 I1b 7 Zb 8 GND 16 1
TSSOP-16 DT SUFFIX CASE 948F
Figure 1. Pinout: 16-Lead Packages Conductors (Top View) TRUTH TABLE
Inputs E H L L L L S X H H L L I0 X X X L H I1 X L H X X Outputs Z L L H L H
EIAJ-16 M SUFFIX CASE 966
PIN NAMES
PIN I0a-I0d I1a-I1d E S Za-Zd FUNCTION Source 0 Data Inputs Source 0 Data Inputs Enable Input Select Input Outputs
H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
DEVICE MARKING INFORMATION
See general marking information in the device marking section on page 3 of this data sheet.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(c) Semiconductor Components Industries, LLC, 2005
1
January, 2005 - Rev. 6
Publication Order Number: MC74AC157/D
MC74AC157, MC74ACT157
E I0a I1a I0b I1b I0c I1c I0d I1d S Za Zb Zc Zd
Figure 2. Logic Symbol
FUNCTIONAL DESCRIPTION The MC74AC157/74ACT157 is a quad 2-input multiplexer. It selects four bits of data from two sources under the control of a common Select input (S). The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced LOW regardless of all other inputs. The MC74AC157/74ACT157 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are shown below:
Za = E*(I1a*S+I0a*S) Zb = E*(I1b*S+I0b*S) Zc = E*(I1c*S+I0c*S) Zd = E*(I1d*S+I0d*S) A common use of the MC74AC157/74ACT157 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The MC74AC157/74ACT157 can generate any four of the sixteen different functions of two variables with one variable common. This is useful for implementing gating functions.
I0a
I1a
I0b
I1b
I0c
I1c
I0d
I1d
E
S
Za NOTE:
Zb
Zc
Zd
This diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
Figure 3. Logic Diagram
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MC74AC157, MC74ACT157
MARKING DIAGRAMS
PDIP-16 MC74AC157N AWLYYWW SOIC-16 AC157 AWLYWW TSSOP-16 EIAJ-16
AC 157 ALYW
74AC157 ALYW
MC74ACT157N AWLYYWW
ACT157 AWLYWW
ACT 157 ALYW
74ACT157 ALYW
A WL, L YY, Y WW, W
= Assembly Location = Wafer Lot = Year = Work Week
MAXIMUM RATINGS
Symbol VCC VIN VOUT IIN IOUT ICC Tstg Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin DC Output Sink/Source Current, per Pin DC VCC or GND Current per Output Pin Storage Temperature Value -0.5 to +7.0 -0.5 to VCC +0.5 -0.5 to VCC +0.5 20 50 50 -65 to +150 Unit V V V mA mA mA C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VIN, VOUT Supply Voltage DC Input Voltage, Output Voltage (Ref. to GND) VCC @ 3.0 V tr, tf Input Rise and Fall Time (Note 1) I t Ri d F ll Ti (N t AC Devices except Schmitt Inputs AC exce t In uts VCC @ 4.5 V VCC @ 5.5 V tr, tf TJ TA IOH IOL In ut Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs Junction Temperature (PDIP) Operating Ambient Temperature Range Output Current - High Output Current - Low VCC @ 4.5 V VCC @ 5.5 V Parameter AC ACT Min 2.0 4.5 0 - - - - - - -40 - - Typ 5.0 5.0 - 150 40 25 10 8.0 - 25 - - Max 6.0 5.5 VCC - - - - - 140 85 -24 24 ns/V C C mA mA ns/V V V Unit
1. VIN from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. VIN from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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MC74AC157, MC74ACT157
DC CHARACTERISTICS
74AC Symbol Parameter VCC (V) TA = +25C Typ VIH Minimum High Level u g ee Input Voltage Maximum Low Level a u o ee Input Voltage Minimum High Level u g ee Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum Low Level a u o ee Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN IOLD IOHD ICC Maximum Input a u u Leakage Current Minimum Dynamic y Output Current Maximum Quiescent a u Qu esce Supply Current 5.5 55 5.5 5.5 55 5.5 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 - - - 0.002 0.001 0.001 - - - - - - - 74AC TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.56 3.86 4.86 0.1 0.1 0.1 0.36 0.36 0.36 0.1 0 1 - - 80 8.0 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 1.0 1 0 75 -75 80 V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 mA V *VIN = VIL or VIH -12 mA IOH -24 mA -24 mA IOUT = 50 mA V *VIN = VIL or VIH 12 mA IOL 24 mA 24 mA VI = VCC, GND VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
VIL
V
VOH
V
V
mA mA mA mA
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: IIN and ICC @ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V VCC.
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74AC Symbol Parameter VCC* (V) Min tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay o aga o e ay S to Zn Pro agation Propagation Delay S to Zn Propagation Delay Pro agation E to Zn Pro agation Propagation Delay En to Zn Pro agation Propagation Delay In to Zn Pro agation Propagation Delay In to Zn 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 3.3 5.0 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 TA = +25C CL = 50 pF Typ 7.0 5.5 6.5 5.0 7.0 5.5 6.5 5.5 5.0 4.0 5.0 4.0 Max 11.5 9.0 11.0 8.5 11.5 9.0 11.0 9.0 8.5 6.5 8.0 6.5 74AC TA = -40C to +85C CL = 50 pF Min 1.5 1.5 1.5 1.0 1.5 1.5 1.5 1.0 1.0 1.0 1.0 1.0 Max 13.0 10.0 12.0 9.5 13.0 10.0 12 9.5 9.0 7.0 9.0 7.0 ns ns ns ns ns ns 3-6 3-6 3-6 3-6 3-5 3-5 Unit Fig. No.
*Voltage Range 3.3 V is 3.3 V 0.3 V. *Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC157, MC74ACT157
DC CHARACTERISTICS
74ACT Symbol Parameter VCC (V) TA = +25C Typ VIH VIL VOH Minimum High Level u g ee Input Voltage Maximum Low Level a u o ee Input Voltage Minimum High Level u g ee Output Voltage 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum Low Level a u o ee Output Voltage 4.5 5.5 4.5 5.5 IIN DICCT IOLD IOHD ICC Maximum Input a u u Leakage Current Additional Max. ICC/Input Minimum Dynamic Output C O t t Current t Maximum Quiescent a u Qu esce Supply Current 5.5 55 5.5 5.5 5.5 5.5 55 1.5 1.5 1.5 1.5 4.49 5.49 - - 0.001 0.001 - - - 0.6 - - - 74ACT TA = -40C to +85C Unit Conditions
Guaranteed Limits 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 0.1 0 1 - - - 8.0 80 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 1.0 1 0 1.5 75 -75 80 V V V VOUT = 0.1 V or VCC - 0.1 V VOUT = 0.1 V or VCC - 0.1 V IOUT = -50 mA *VIN = VIL or VIH -24 mA IOH -24 mA IOUT = 50 mA *VIN = VIL or VIH 24 mA IOL 24 mA VI = VCC, GND VI = VCC - 2.1 V VOLD = 1.65 V Max VOHD = 3.85 V Min VIN = VCC or GND
V
V
V
mA mA mA mA mA
*All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time.
AC CHARACTERISTICS (For Figures and Waveforms - See Section 3 of the ON Semiconductor FACT Data Book, DL138/D)
74ACT Symbol Parameter VCC* (V) Min tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay Pro agation S to Zn Pro agation Propagation Delay S to Zn Pro agation Propagation Delay En to Zn Pro agation Propagation Delay En to Zn Pro agation Propagation Delay In to Zn Propagation Delay Pro agation In to Zn 50 5.0 5.0 50 5.0 50 5.0 50 5.0 50 50 5.0 20 2.0 2.0 20 1.5 15 1.5 15 1.5 15 15 1.5 TA = +25C CL = 50 pF Typ - - - - - - Max 90 9.0 9.5 95 10 8.5 85 7.0 70 75 7.5 74ACT TA = -40C to +85C CL = 50 pF Min 15 1.5 2.0 20 1.5 15 1.0 10 1.0 10 10 1.0 Max 10 0 10.0 10.5 10 5 11.5 11 5 9.0 90 8.5 85 85 8.5 ns ns ns ns ns ns 3-6 3-6 3-6 3-6 3-5 3-5 Unit Fig. No.
*Voltage Range 5.0 V is 5.0 V 0.5 V.
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MC74AC157, MC74ACT157
CAPACITANCE
Symbol CIN CPD Input Capacitance Power Dissipation Capacitance Parameter Value Typ 4.5 50 Unit pF pF Test Conditions VCC = 5.0 V VCC = 5.0 V
ORDERING INFORMATION
Device Order N mber Number MC74AC157N MC74AC157NG MC74ACT157N MC74AC157D MC74ACT157D MC74ACT157DG MC74AC157DR2 MC74AC157DR2G MC74ACT157DR2 MC74ACT157DR2G MC74AC157DT MC74ACT157DT MC74AC157DTR2 MC74ACT157DTR2 MC74AC157M MC74ACT157M MC74AC157MEL MC74ACT157MEL Package PDIP-16 PDIP-16 (Pb-Free) PDIP-16 SOIC-16 SOIC-16 SOIC-16 (Pb-Free) SOIC-16 SOIC-16 (Pb-Free) SOIC-16 SOIC-16 (Pb-Free) TSSOP-16* TSSOP-16* TSSOP-16* TSSOP-16* EIAJ-16 EIAJ-16 EIAJ-16 EIAJ-16 Shipping 25 Units / Rail 25 Units / Rail 25 Units / Rail 48 Units / Rail 48 Units / Rail 48 Units / Rail 2500 Tape & Reel 2500 Tape & Reel 2500 Tape & Reel 2500 Tape & Reel 96 Units / Rail 96 Units / Rail 2500 Tape & Reel 2500 Tape & Reel 50 Units / Rail 50 Units / Rail 2000 Tape & Reel 2000 Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb-Free.
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MC74AC157, MC74ACT157
PACKAGE DIMENSIONS
PDIP-16 N SUFFIX CASE 648-08 ISSUE T
-A-
16 9
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL.
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
DIM A B C D F G H J K L M S
INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040
MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
SOIC-16 D SUFFIX CASE 751B-05 ISSUE J
-A-
16 9
-B-
1 8
P
8 PL
0.25 (0.010)
M
B
S
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019
G F
K C -T-
SEATING PLANE
R
X 45 _
M D
16 PL M
J
0.25 (0.010)
TB
S
A
S
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MC74AC157, MC74ACT157
PACKAGE DIMENSIONS
TSSOP-16 DT SUFFIX CASE 948F-01 ISSUE O
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 --- 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.18 0.28 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 --- 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.007 0.011 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_
16X K REF
0.10 (0.004) 0.15 (0.006) T U
S
M
TU
S
V
S
K
16
2X
L/2
9
J1 B -U-
L
PIN 1 IDENT. 1 8
SECTION N-N J
N 0.25 (0.010) 0.15 (0.006) T U
S
A -V- N F DETAIL E
C 0.10 (0.004) -T- SEATING
PLANE
H D G
DETAIL E
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CCC EE CCC EE CCC
M
K1
-W-
MC74AC157, MC74ACT157
PACKAGE DIMENSIONS
EIAJ-16 M SUFFIX CASE 966-01 ISSUE O
16
9
LE Q1 E HE M_ L DETAIL P
1
8
Z D e A VIEW P
c
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 0.78 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.031
b 0.13 (0.005)
M
A1 0.10 (0.004)
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MC74AC157, MC74ACT157
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MC74AC157/D

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